(1) Field of the Invention
The invention relates to processes for the manufacture of semiconductor devices and more particularly to processes related to the trench isolation.
(2) Description of Previous Art
The fabrication of integrated circuits involves the forming of semiconductor devices within the surface of silicon wafers. In order to insulate these devices from each other, it is necessary to provide insulative regions beneath them and laterally surrounding them. The regions which insulate these devices from each other are called device isolation. Most frequently, isolation along the base of the devices is provided by means of junction isolation whereby a p/n junction, appropriately biased, forms the insulative region.
In early technology the periphery of the device was also provided with junction isolation. Subsequently regions of silicon oxide were imbedded into the regions surrounding the device by means of localized-oxidation-of-silicon (LOCOS). The use of LOCOS in its many variations has enjoyed several decades of preferred use. In recent years, the need for reduced lateral spacing to accommodate higher densities of smaller and smaller devices has encouraged the development of trench isolation as a direct replacement of LOCOS. The devices are surrounded by narrow trenches filled with an insulator such as silicon oxide. The trenches are formed by anisotropic etching, usually reactive-ion-etching(RIE), which can create isolation regions less than one micron wide and several microns deep. As technology advances to smaller dimensions in the plane of the wafer, the aspect ratio of these trenches becomes higher. The aspect ratio is defined as the ratio of the trench depth to its width.
Referring to FIG. 1, there is shown a cross section of a silicon wafer 10 after an RIE step where deep high-aspect-ratio trenches 14 have been cut into its surface. The layer 12 represents residual masking material from the RIE operation.
It is widely agreed, that the etching anisotropy of RIE results from the formation of a protective layer 15 along the sidewalls of the trench 14 during etching. This protective layer 15 prevents lateral etching while ion bombardment at the base of the trench perpetuates the etching front. There are a number of chemistries in use for the RIE of silicon. The composition of the protective layer 15 is dependent upon the chemistry and the parametric conditions used. In common practices the layer consists of carbonaceous or silicateous polymers which remain after the etching is completed and must be removed before processing can continue. In some cases the protective layer 15 may consist of chemisorbed halogen species or even silicon oxide.
It is with the efficacious removal of these protective layer components and any other foreign residues left behind by the RIE process that this invention is concerned. Because of the topology of the trenches themselves it is difficult to cause aqueous etchants to thoroughly penetrate them and allow them to be rinsed clean.
A flow chart of a method for removal of this protective layer is shown in FIG. 2. Dissolution of the polymeric protective layer is typically accomplished by a dip in dilute hydrofluoric acid(HF) 30. Anions, probably SiF.sub.6.sup..dbd., its ion complex, or HSiO.sub.3.sup.--, chemisorbed on the silicon, are created by this treatment through the interaction of fluoride with exposed silicon surfaces. These species are not readily rinsed away 32 during subsequent de-ionized water rinsing procedures. Consequently, after the wafers have been subjected to the rinse/spin-dry regimen, pockets of rinse water remain in the high aspect ratio trenches, particularly in deep corners. The chemisorbed ionic species diffuse into the water pockets and concentrate as the pockets evaporate. Finally, precipitation takes place resulting in residue regions akin to watermarks.
To illustrate this the reader is referred to FIG. 3 where there is shown a cross section of the wafer from FIG. 1 subsequent to the dissolution of the protective layer 15 and during rotation about the axis 24 in a spin dryer after de-ionized water rinsing. The liquid pockets 18 cannot be flung free and remain after the spin dry step whereupon the liquid evaporates, concentrating the ions 22, and eventually resulting in precipitation to form a watermark. Likewise, liquid droplets 20 remain on surface edges after spinning is stopped. Deep topographic features such as 16, which happen to face the rotational axis 24 will also retain residual liquid and result in residue precipitation.
A method using NH.sub.4 OH/H.sub.2 O.sub.2 or HCL/H.sub.2 O.sub.2 solutions, commonly called RCA cleaning, which does not result in the formation of fluorosilicate anionic species is illustrated by FIG. 4. A discussion of the RCA technique may be found in Wolf, S. and Tauber, R. N., "Silicon Processing for the VLSI Era", Vol. 1, Lattice Press, Sunset Beach, Calif., (1986), p516ff. These cleaning solutions 40 are not as effective at removing the sidewall polymer as the HF based solutions. Subsequent rinse/spin-dry operations 42 leave aqueous pockets in the high aspect ratio trenches and in deep corners of the wafer topography. Evaporation, concentrates the polymer residues in these regions which eventually precipitate, leaving watermarks on the wafer surface.
As is to be anticipated, the severity of the problem increases as the aspect ratio of the trench increases. The watermark residues have deleterious effects on the operating characteristics of the devices wherein they are present. Not only are the electrical characteristics below standard and non-uniform, but also the reliability of the devices is placed at risk.
Fukazawa, U.S. Pat. No. 5,470,393 describes a method for cleaning silicon wafers wherein a sequence of HF--HCl/H.sub.2 O.sub.2 -- water occurs. The procedure is accomplished in a single etchant tank. The components pass through the tank in a continuous flow with varying concentrations. The components are added to and removed from the flow in a programmed sequence such that during one period all three(HF, H.sub.2 O.sub.2, and HCl) are present in the tank. The programmed sequence is designed to repress the formation of native oxide which inhibits the removal of copper, and does not address the removal of silicateous and polymeric residues.
Chen U.S. Pat. No. 5,308,400 describes a technique for removing particulates from silicon wafers in process which uses a room temperature HF--NH.sub.4 OH/H.sub.2 O.sub.2 --H.sub.2 O cleaning sequence with vigorous agitation by nitrogen bubbling and spraying.